Currently, multi-level voltage source converter is widely used, which can equivalently decrease the switching frequency and improve the output waveform quality.
FIG. 1 illustrates a topology according to a conventional multi-level voltage converter, wherein a switching gear cell 1 includes a first energy store 100 and a second energy store 101 connected in series with power semiconductors for switching, for example, five voltage levels. A first, second, third and fourth power semiconductors 110, 111, 112, 113 are connected in series, a fifth and sixth power semiconductors 114, 115 are connected in series. The first and fourth power semiconductors 110, 114 are respectively connected with the first and second energy stores 100, 101, and the junction point A between the first and second energy stores 100, 101, the junction point B between the fifth and sixth power semiconductors 114, 115, and the junction point C between the second and third power semiconductors 111,112 are connected with each other. The switching gear cell further includes a seventh, eighth, ninth and tenth power semiconductors 116, 117, 118, 119 are connected in series, a eleventh and twelfth power semiconductors 120, 121 are connected in series. The seventh and tenth power semiconductors 116, 119 are respectively connected with the first and second energy stores 100, 101, and the junction point A between the first and second energy stores 100, 101, the junction point D between the eleventh and twelfth power semiconductors 120, 121 are connected with each other. The junction point between the eighth and ninth power semiconductors 117,118 is arranged for output terminal for outputting the multi-level voltage, for example, a five-level voltage as shown at the right side of FIG. 1. Each of the first, second, third, fourth, seventh, eighth, ninth and tenth power semiconductors 110, 111, 112, 113, 116, 117, 118, 119 is a drivable unidirectional power semiconductor switch with an anti-paralleled uncontrolled unidirectional current-carrying semiconductor, such as IGCT or IGBT etc., and each of the fifth, sixth, eleventh, and twelfth power semiconductors is a uncontrolled unidirectional current-carrying direction power semiconductor, such as power diode.
FIG. 2 illustrates a topology according to another conventional multi-level voltage converter. As shown in FIG. 2, a switching gear cell 2 uses cascaded H-bridges. The first H-bridge of the switching gear cell 2 includes a first energy store 200, a first and second power semiconductors 210, 211 connected in series, a third and fourth power semiconductors 212, 213 connected in series. And, the first energy store 200, the first power semiconductor 210 and the third power semiconductor 212 are connected with each other at junction point A, the first energy store 200, the second power semiconductor 211 and the fourth power semiconductor 213 are connected with each other at junction point B. The second bridge of the switching gear cell 2 has a similar topology as to the first H-bridge, which includes a second energy store 201, a fifth, sixth, seventh, and eighth power semiconductors 214, 215, 216, 217. The junction point between the first and second power semiconductors 210, 211 and the junction point between the fifth and sixth power semiconductors 214, 215 are connected with each other. The voltage is output between the junction point between the third and fourth power semiconductors and the junction point between the seventh and eighth power semiconductors. The output voltage waveform is shown at the right side of FIG. 2. Each of the first, second, third, fourth, fifth, sixth, seventh, eighth power semiconductors is a drivable unidirectional power semiconductor switch with an anti-paralleled uncontrolled unidirectional current-carrying semiconductor.
FIG. 3 illustrates a topology according to another conventional multi-level voltage converter. As shown in FIG. 3, wherein a switching gear cell 3 includes a first energy store 300 and a second energy store 301 connected in series with power semiconductors for switching, for example, five voltage levels. A first, second, third and fourth power semiconductors 410, 411, 412, 413 are connected in series, a fifth and sixth power semiconductors 414, 415 are connected in series. The first and fourth power semiconductors 410, 413 are respectively connected with the first and second energy stores 400, 401, and the junction point A between the first and second energy stores 400, 401, the junction point B between the fifth and sixth power semiconductors 414, 415 are connected with each other. The switching gear cell further includes a third energy store 402, a seventh and eighth power semiconductors 416, 417 connected in series, and a ninth and tenth power semiconductors 418, 419 connected in series. One end of the third energy store 402, the seventh and ninth power semiconductors 416, 418 are connected with each other, and the other end of the third energy store 402, the eighth and tenth power semiconductors 417, 419 are connected with each other. Furthermore, the junction point between the second and third second and third power semiconductors 411, 412 is connected with the junction point between the ninth and tenth power semiconductors 418, 419. The voltage is output at the junction point between the seventh and eighth power semiconductors 416, 417. Each of the first, second, third, fourth, seventh, eighth, ninth and tenth power semiconductors is a drivable unidirectional power semiconductor switch with an anti-paralleled uncontrolled unidirectional current-carrying semiconductor, and each of the fifth and sixth power semiconductors is a uncontrolled unidirectional current-carrying direction power semiconductor. Its output waveform is shown at the right side of FIG. 3.
From analysis of the multi-level voltage converter according to each of FIGS. 1, 2 and 3, such conventional topology has at least drawbacks as that: it requires a relatively large number of power semiconductors, which increases the cost of the multi-level voltage converter but decreases the reliability. In addition, the repetitive peak off-state voltage of each of the power semiconductors according to FIGS. 1 to 3 is described as VDRM=(1.8˜2.2)Vdc.
Another conventional multi-level voltage converter is disclosed by patent, U.S. Pat. No. 7,639,515. A switchgear has a first energy store and a second energy store connected in series, a first, second, third and fourth power semiconductor switch connected in series. The first and fourth power semiconductor are respectively connected to the first energy store and the second energy store. A third energy store is connected to the junction between the first and the second power semiconductor and the junction between the third and the fourth semiconductor. Furthermore, it includes a switching element connected directly to the junction pint between the second and the third power semiconductor and directly to the junction point between the first energy store and the second energy store. An estimation of the magnitude of its output is needed in expression of ration with Vdc as: Vout=2×Vdc/1.414/1.1. U.S. Pat. No. 7,639,515 has at least drawbacks as that: 1. Due to a lower ration between the Vout and Vdc, it requires a higher voltage class of the power semiconductors, the power capacitor, and all the components of the converter related to the DC link. Higher voltage class of power semiconductor, power capacitor and all the related components leads to higher cost of voltage converter. 2. It requires a relatively large number of power semiconductors, which increases also the cost of the multi-level voltage converter but decreases the reliability.